SPICE and Verilog Code

This page contains some SPICE and Verilog code from examples in the textbook. The code has been tested to run for the authors in our environment. However, some code is likely to require tweaking to work in other environments. In particular, you will need to choose the appropriate model file path for your system in the SPICE decks. The Perl characterization scripts may also be sensitive to your environment. We cannot provide technical support.


Verilog Code