Eng 190o Lab #2

Purpose

The purpose of this lab is to add vector or SIMD instructions to a pipelined LXRE CPU.

SIMD Instructions

You will need to implement 2 SIMD instructions in your processor, a vector add and a vector multiply. The LXRE Assembler supports pseduo-instructions for these operations. LXRE supports SIMD through the LSC, a SIMD co-processor. Be sure to read the LSC resource material.

Matrix Square

To gauge the effectiveness of SIMD processors, write various matrix multiplies that do not use SIMD and use SIMD. Starter code is in asm/msquare.lxre, and an example python script is in scripts/msquare.py. The code takes in a space separated list of hexidecimal numbers representing a 4x4 array, the output is the same.

You will need to modify the code in asm/msquare.lxre to implement a matrix square operation for testing. You should implement both a version that uses SIMD instructions, and a version that does not in order to be able to compare the performance benefits from adding a SIMD co-processor. I highly recommend you pay close attention to the instructions that the assembler produces from the pseudo instructions, as you will be required to implement the real instructions in your processor.

Part 0

Due March 1, 2013

Implement the scalar msquare code and vector msquare code that works in the simulator.

Part 1

Due March 8, 2013

This part involves implementing a memory mapped profiler for your lxre cpu. You should add a SystemVerilog module that implements the following functions for 8 hardware counters:

• Reset counter
• Start counter
• Stop counter
• Read counter

The memory region you have available is 0x1100-0x12FF. In addition to implementing your hardware profiler, you should use it to profile your msquare code. You should report some information about the way your lxre handles msquare.

Part 2

Due March 15, 2013

You should implement a memory mapped vector unit that can perform the appropriate functions to complete your simd add and multiply.