Labs

This page contains labs to build the 8-bit MIPS processor described in Chapter 1. Versions are available for both the industry-standard Cadence/Synopsys tool flow and for the open-source Electric flow.

The labs are provided "as-is" with no support or warranty. A good degree of tool knowledge is required on the part of the instructor, especially for installing the Cadence tools. Erik Brunvand's book, Digital VLSI Chip Design with Cadence and Synopsys CAD Tools is extremely helpful for instructors interested in deploying these tools. The Cadence labs assume that you have already installed the NCSU Cadence Design Kit and the University of Utah technology library. The Electric labs were tested on version 8.06 of Electric.

Brunvand's book also provides detailed tutorials of value to students learning the Cadence and Synopsys tools. The book is available for an additional $15 when ordered with the 4th edition of CMOS VLSI Design. Use ISBN 0137060815.

Cadence/Synopsys Electric

Lab files (tar.gz)
Lab 1 (doc) (pdf)
Lab 2 (doc) (pdf)
Lab 3 (doc) (pdf)
Lab 4 (doc) (pdf)
Electric 8.06
Lab files (zip)
Lab 1 (doc) (pdf)
Lab 2 (doc) (pdf)
Lab 3 (doc) (pdf)
Lab 4 (doc) (pdf)
Solutions (instructors only)