High Speed Circuit Design Handouts
This page contains most of the handouts from my High Speed Circuit Design
class in PDF format. The class was taught autumn 1997 at HAL Computer.
Materials on this page are (c) 1997 David Harris, all rights reserved.
Warning: these notes are in first draft form. The information may have typos
or be just plain incorrect. Think about the ideas before you accept them
as true. I would appreciate receiving bug reports.
Administrative
Syllabus
Lecture Notes
Lecture 1: Gate Delay Models
Lecture 2: Logical Effort & Sizing
Lecture 3: Sizing & Simulation
Lecture 4: Interconnect RC
Lecture 5: Interconnect RLC
Lecture 6: Static Circuits
Lecture 7: Dynamic Circuits
Lecture 8: Circuits & Pitfalls
Lecture 9: Sequential Logic I
Lecture 10: Sequential Logic II
Lecture 11: Clocking
Lecture 12: Adders
Lecture 13: Arrays
Lecture 14: Asynchronous Circuits
Lecture 15: Dividers (see dividers readings)
Lecture 16: Summary
Problem Sets
Problem Set 1
Problem Set 2
Problem Set 3
Problem Set 4
Problem Set 5
Problem Set 6
Problem Set 7
(no Problem Set 8)
Problem Set 9
Project
Project: FemptoHAL Processor
Project Phase 1
Project Phase 2
Project Phase 3
Project Presentation Guidelines
Readings
The Fanout-of-4 Inverter Delay Metric
Skew-tolerant Domino Circuits
Skew-tolerant Domino Circuits slides
SRT Division Architectures and Implementations
SRT Division slides
Many other readings are not available online.
harrisd@leland.stanford.edu
Last modified: Mon Nov 17 17:49:19 PST 1997